Encoding:

Format:

SBE rt, offset(base)

Purpose:

Store Byte EVA

To store a byte to user mode virtual address space when executing in kernel mode.

Description:

 memory[GPR[base] + offset] = GPR[rt]

The least-significant 8-bit byte of GPR rt is stored in memory at the location specified by the effective address. The

9-bit signed offset is added to the contents of GPR base to form the effective address.

The SBE instruction functions the same as the SB instruction, except that address translation is performed using the user mode virtual address space mapping in the TLB when accessing an address within a memory segment configured to use the MUSUK access mode. Memory segments using UUSK or MUSK access modes are also accessible.

Refer to Volume III, Enhanced Virtual Addressing section for additional information.

Implementation of this instruction is specified by the Config5_EVA field being set to 1.

Restrictions:

Only usable when access to Coprocessor0 is enabled and when accessing an address within a segment configured using UUSK, MUSK or MUSUK access mode.

Operation:

vAddr = sign_extend(offset) + GPR[base]
(pAddr, CCA) = AddressTranslation (vAddr, DATA, STORE)
pAddr = pAddrPSIZE-1..3 || (pAddr2..0 xor ReverseEndian3)
bytesel = vAddr2..0 xor BigEndianCPU3
datadoubleword = GPR[rt]63-8*bytesel..0 || 08*bytesel
StoreMemory (CCA, BYTE, datadoubleword, pAddr, vAddr, DATA)

Exceptions:

TLB Refill, TLB Invalid, Bus Error, Address Error, Watch, Reserved Instruction, Coprocessor Unusable,