Encoding:

POOL32A

000000

rt

Impl

MTHC2

1001110100

POOL32AXf

111100

6

5

5

10

6

Format:

MTHC2 rt, Impl

microMIPS

Move Word to High Half of Coprocessor 2 Register

Purpose:

Move Word to High Half of Coprocessor 2 Register

To copy a word from a GPR to the high half of a COP2 general register.

Description:

 CP2CPR[Impl]63..32 = GPR[rt]31..0

The low word in GPR rt is placed into the high word of coprocessor 2 general register denoted by the Impl field. The interpretation of the Impl field is left entirely to the Coprocessor 2 implementation and is not specified by the architecture.

Restrictions:

The results are UNPREDICTABLE if the Impl field specifies a coprocessor 2 register that does not exist, or if that register is not 64 bits wide.

In implementations prior to Release 2 of the architecture, this instruction resulted in a Reserved Instruction exception.

Operation:

data = GPR[rt]31..0
CP2CPR[Impl] = data || CPR[2,rd,sel]31..0 

Exceptions:

Coprocessor Unusable, Reserved Instruction

Programming Notes

When paired with MTC2 to write a value to a 64-bit CPR, the MTC2 must be executed first, followed by the

MTHC2. This is because of the semantic definition of MTC2, which is not aware that software is using an MTHC2 instruction to complete the operation, and sets the upper half of the 64-bit CPR to an UNPREDICTABLE value.