LW32 111111 |
rt |
base |
offset |
6 |
5 |
5 |
16 |
LW rt, offset(base) |
microMIPS |
Load Word |
Load Word
To load a word from memory as a signed value
GPR[rt] = memory[GPR[base] + offset]
The contents of the 32-bit word at the memory location specified by the aligned effective address are fetched, signextended to the GPR register length if necessary, and placed in GPR rt. The 16-bit signed offset is added to the contents of GPR base to form the effective address.
Pre-Release 6: The effective address must be naturally-aligned. If either of the 2 least-significant bits of the address is non-zero, an Address Error exception occurs.
Release 6 allows hardware to provide address misalignment support in lieu of requiring natural alignment.
Note: The pseudocode is not completely adapted for Release 6 misalignment support as the handling is implementation dependent.
vAddr = sign_extend(offset) + GPR[base] (pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD) pAddr = pAddrPSIZE-1..3 || (pAddr2..0 xor (ReverseEndian || 02)) memdoubleword = LoadMemory (CCA, WORD, pAddr, vAddr, DATA) byte = vAddr2..0 xor (BigEndianCPU || 02) GPR[rt] = sign_extend(memdoubleword31+8*byte..8*byte)
TLB Refill, TLB Invalid, Bus Error, Address Error, Watch