Encoding:

Format:

LWUPC rt, offset

Purpose:

Load Word Unsigned PC-relative

To load a word from memory as an unsigned value, using a PC-relative address.

Description:

GPR[rt] = memory[ PC + sign_extend( offset << 2 ) ]

The 19-bit offset is shifted left by 2 bits, sign-extended, and added to the address of the LWUPC instruction.

The contents of the 32-bit word at the memory location specified by the aligned effective address are fetched, zeroextended to the GPR register length if necessary, and placed in GPR rt.

Restrictions:

LWUPC is naturally aligned, by specification.

Availability and Compatibility:

This instruction is introduced by and required as of MIPS64 Release 6.

Operation

vAddr = (  PC + sign_extend(offset)<< 2)
(pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD)
memword = LoadMemory (CCA, WORD, pAddr, vAddr, DATA)
GPR[rt] = zero_extend(memword)

Exceptions:

TLB Refill, TLB Invalid, TLB Read Inhibit, Bus Error, Address Error, Watch

Programming Note

The Release 6 PC-relative loads (LWPC, LWUPC, LDPC) are considered data references.

For the purposes of watchpoints (provided by the CP0 WatchHi and WatchLo registers) and EJTAG breakpoints, the

PC-relative reference is considered to be a data reference rather than an instruction reference. That is, the watchpoint or breakpoint is triggered only if enabled for data references.