Encoding:

LH32

001111

rt

base

offset

6

5

5

16

Format: 

LH rt, offset(base)

microMIPS

Load Halfword

Purpose:

Load Halfword

To load a halfword from memory as a signed value

Description: 

 GPR[rt] = memory[GPR[base] + offset]

The contents of the 16-bit halfword at the memory location specified by the aligned effective address are fetched, sign-extended, and placed in GPR rt. The 16-bit signed offset is added to the contents of GPR base to form the effective address.

Restrictions:

Pre-Release 6: The effective address must be naturally-aligned. If the least-significant bit of the address is non-zero, an Address Error exception occurs.

Release 6 allows hardware to provide address misalignment support in lieu of requiring natural alignment.

Note: The pseudocode is not completely adapted for Release 6 misalignment support as the handling is implementation dependent.

Operation: 

vAddr = sign_extend(offset) + GPR[base]
(pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD)
pAddr = pAddrPSIZE-1..3 || (pAddr2..0 xor (ReverseEndian2 || 0))
memdoubleword = LoadMemory (CCA, HALFWORD, pAddr, vAddr, DATA)
byte = vAddr2..0 xor (BigEndianCPU2 || 0)
GPR[rt] = sign_extend(memdoubleword15+8*byte..8*byte)

Exceptions:

TLB Refill, TLB Invalid, Bus Error, Address Error, Watch