Encoding:

Format:

LDPC rt, offset

Purpose:

Load Doubleword PC-relative

To load a doubleword from memory, using a PC-relative address.

Description:

GPR[rt] = memory[ (PC&~0x7) + sign_extend( offset << 3) ]

The bit offset is shifted left by 3 bits, sign-extended, and added to the address of the aligned doubleword containing the LDPC instruction.

The contents of the 64-bit doubleword at the memory location specified by the effective address are fetched, and placed in GPR rt.

Restrictions:

LDPC is naturally aligned, by specification.

Availability and Compatibility:

This instruction is introduced by and required as of Release 6.

Operation

vAddr = ( (PC&~0x7)+ sign_extend(offset) )
(pAddr, CCA) = AddressTranslation (vAddr, DATA, LOAD)
memdoubleword = LoadMemory (CCA, DOUBLEWORD, pAddr, vAddr, DATA)
GPR[rt] = memdoubleword

Exceptions:

TLB Refill, TLB Invalid, TLB Read Inhibit, Bus Error, Address Error, Watch, Reserved Instruction

Programming Note

The Release 6 PC-relative loads (LWPC, LWUPC, LDPC) are considered data references.

For the purposes of watchpoints (provided by the CP0 WatchHi and WatchLo registers) and EJTAG breakpoints, the

PC-relative reference is considered to be a data reference, rather than an instruction reference. That is, the watchpoint or breakpoint is triggered only if enabled for data references.