POOL32S 010110 |
rt |
rs |
msbd |
lsb |
DINSU 110100 |
6 |
5 |
5 |
5 |
5 |
5 |
DINSU rt, rs, pos, size |
microMIPS64 |
Doubleword Insert Bit Field Upper |
Doubleword Insert Bit Field Upper
To merge a right-justified bit field from GPR rs into a specified position in GPR rt.
GPR[rt] = InsertField(GPR[rt], GPR[rs], msb, lsb)
The right-most size bits from GPR rs are inserted into the value from GPR rt starting at bit position pos. The result is placed back in GPR rt. The assembly language arguments pos and size are converted by the assembler to the instruction fields msbminus32 (the most significant bit of the field, minus 32), in instruction bits 15..11, and lsbminus32
(least significant bit of the field, minus 32), in instruction bits 10..6, as follows:
msbminus32 = pos+size-1-32 lsbminus32 = pos-32 msb = msbminus32 + 32 lsb = lsbminus32 + 32
For this instruction, the values of pos and size must satisfy all of the following relations:
32 <= pos < 64 1 <= size <= 32 32 < pos+size <= 64
In implementations pre-Release 2 of the architecture, the instruction resulted in a Reserved Instruction exception.
The operation is UNPREDICTABLE if lsb > msb.
lsb = lsbminus32 + 32 msb = msbminus32 + 32 if (lsb > msb) then UNPREDICTABLE endif GPR[rt] = GPR[rt]63..msb+1 || GPR[rs]msb-lsb..0 || GPR[rt]lsb-1..0
Reserved Instruction
Programming Notes
The assembler accepts any value of pos and size that satisfies the relationship 0 < pos+size <= 64 and emit DINS,
DINSM, or DINSU as appropriate to the values. Programmers should always specify the DINS mnemonic and let the assembler select the instruction to use.