POOL32S 010110 |
rt |
rs |
msbd |
lsb |
DINSM 000100 |
6 |
5 |
5 |
5 |
5 |
5 |
DINSM rt, rs, pos, size |
microMIPS64 |
Doubleword Insert Bit Field Middle |
Doubleword Insert Bit Field Middle
To merge a right-justified bit field from GPR rs into a specified position in GPR rt.
GPR[rt] = InsertField(GPR[rt], GPR[rs], msb, lsb)
The right-most size bits from GPR rs are inserted into the value from GPR rt starting at bit position pos. The result is placed back in GPR rt. The assembly language arguments pos and size are converted by the assembler to the instruction fields msbminus32 (the most significant bit of the field, minus 32), in instruction bits 15..11, and lsb (least significant bit of the field), in instruction bits 10..6, as follows:
msbminus32 = pos+size-1-32 lsb = pos msb = msbminus32 + 32
For this instruction, the values of pos and size must satisfy all of the following relations:
0 <= pos < 32 2 <= size <= 64 32 < pos+size <= 64
In implementations prior to Release 2 of the architecture, this instruction resulted in a Reserved Instruction exception.
Because of the instruction format, lsb can never be greater than msb, so there is no UNPREDICATABLE case for this instruction.
msb = msbminus32 + 32 GPR[rt] = GPR[rt]63..msb+1 || GPR[rs]msb-lsb..0 || GPR[rt]lsb-1..0
Reserved Instruction
Programming Notes
The assembler will accept any value of pos and size that satisfies the relationship 0 < pos+size <= 64 and emit DINS,
DINSM, or DINSU as appropriate to the values. Programmers should always specify the DINS mnemonic and let the assembler select the instruction to use.