POOL32S 010110 |
rt |
rs |
msbd |
lsb |
DEXT 101100 |
6 |
5 |
5 |
5 |
5 |
5 |
DEXT rt, rs, pos, size |
microMIPS64 |
Doubleword Extract Bit Field |
Doubleword Extract Bit Field
To extract a bit field from GPR rs and store it right-justified into GPR rt.
GPR[rt] = ExtractField(GPR[rs], msbd, lsb)
The bit field starting at bit pos and extending for size bits is extracted from GPR rs and stored zero-extended and right-justified in GPR rt. The assembly language arguments pos and size are converted by the assembler to the instruction fields msbd (the most significant bit of the destination field in GPR rt), in instruction bits 15..11, and lsb
(least significant bit of the source field in GPR rs), in instruction bits 10..6, as follows:
msbd = size-1 lsb = pos msb = lsb+msbd
For this instruction, the values of pos and size must satisfy all of the following relations:
0 <= pos < 32 0 < size <= 32 0 < pos+size <= 63
In implementations prior to Release 2 of the architecture, this instruction resulted in a Reserved Instruction exception.
Because of the limits on the values of msbd and lsb, there is no UNPREDICTABLE case for this instruction.
GPR[rt] = 063-(msbd+1) || GPR[rs]msbd+lsb..lsb
Reserved Instruction
Programming Notes
The assembler will accept any value of pos and size that satisfies the relationship 0 < pos+size <= 64 and emit DEXT,
DEXTM, or DEXTU as appropriate to the values. Programmers should always specify the DEXT mnemonic and let the assembler select the instruction to use.