POOL32F 010101 |
fs |
fd |
00000 |
fmt |
CLASS 001100000 |
6 |
5 |
5 |
5 |
2 |
9 |
CLASS.fmt |
Scalar Floating-Point Class Mask | |
CLASS fd, fs, fmt |
microMIPS32 Release 6 |
Scalar Floating-Point Class Mask |
CLASS.S fd,fs |
microMIPS32 Release 6 |
Scalar Floating-Point Class Mask |
CLASS.D fd,fs |
microMIPS32 Release 6 |
Scalar Floating-Point Class Mask |
Scalar Floating-Point Class Mask
Scalar floating-point class shown as a bit mask for Zero, Negative, Infinite, Subnormal, Quiet NaN, or Signaling
NaN.
FPR[fd] = class(FPR[fs])
Stores in fd a bit mask reflecting the floating-point class of the floating point scalar value fs.
The mask has 10 bits as follows. Bits 0 and 1 indicate NaN values: signaling NaN (bit 0) and quiet NaN (bit 1). Bits
2, 3, 4, 5 classify negative values: infinity (bit 2), normal (bit 3), subnormal (bit 4), and zero (bit 5). Bits 6, 7, 8, 9 classify positive values: infinity (bit 6), normal (bit 7), subnormal (bit 8), and zero (bit 9).
This instruction corresponds to the class operation of the IEEE Standard for Floating-Point Arithmetic 754TM-2008.
This scalar FPU instruction also corresponds to the vector FCLASS.df instruction of MSA.
The input values and generated bit masks are not affected by the flush-subnormal-to-zero mode FCSR.FS.
The input operand is a scalar value in floating-point data format fmt. Bits beyond the width of fmt are ignored. The result is a 10-bit bitmask as described above, zero extended to fmt-width bits. Coprocessor register bits beyond fmtwidth bits are UNPREDICTABLE (e.g., for CLASS.S bits 32-63 are UNPREDICTABLE on a 64-bit FPU, while bits
32-128 bits are UNPREDICTABLE if the processor supports MSA).
No data-dependent exceptions are possible.
This instruction is introduced by and required as of Release 6.
CLASS.fmt is defined only for formats S and D. Other formats must produce a Reserved Instruction exception
(unless used for a different instruction).
if not IsCoprocessorEnabled(1) then SignalException(CoprocessorUnusable, 1) endif if not IsFloatingPointImplemented(fmt)) then SignalException(ReservedInstruction) endif fin = ValueFPR(fs,fmt) masktmp = ClassFP(fin, fmt) StoreFPR (fd, fmt, ftmp ) /* end of instruction */ function ClassFP(tt, ts, n) /* Implementation defined class operation. */ endfunction ClassFP
Coprocessor Unusable, Reserved Instruction
Unimplemented Operation