Encoding:

Format:

ADD rd, rs, rt 

Purpose:

Add Word

To add 32-bit integers. If an overflow occurs, then trap.

Description:

GPR[rd] = GPR[rs] + GPR[rt]

The 32-bit word value in GPR rt is added to the 32-bit value in GPR rs to produce a 32-bit result.

• If the addition results in 32-bit 2's complement arithmetic overflow, the destination register is not modified and an Integer Overflow exception occurs.

• If the addition does not overflow, the 32-bit result is signed-extended and placed into GPR rd.

Restrictions:

If either GPR rt or GPR rs does not contain sign-extended 32-bit values (bits _63..31 equal), then the result of the operation is UNPREDICTABLE.

Operation:

if NotWordValue(GPR[rs]) or NotWordValue(GPR[rt]) then
   UNPREDICTABLE
endif
temp = (GPR[rs]31||GPR[rs]31..0) + (GPR[rt]31||GPR[rt]31..0)
if temp32 != temp31 then
   SignalException(IntegerOverflow)
else
   GPR[rd] = sign_extend(temp31..0)
endif

Exceptions:

Integer Overflow

Programming Notes:

ADDU performs the same arithmetic operation but does not trap on overflow.