POOL16A 000001 |
rs |
rt |
rd |
0 |
6 |
3 |
3 |
3 |
1 |
ADDU16 rd, rs, rt |
microMIPS |
Add Unsigned Word (16-bit instr size) |
Add Unsigned Word (16-bit instr size)
To add 32-bit integers
GPR[rd] = GPR[rs] + GPR[rt]
The 32-bit word value in GPR rt is added to the 32-bit value in GPR rs, and the 32-bit arithmetic result is signextended and placed into GPR rd.
No Integer Overflow exception occurs under any circumstances.
The 3-bit register fields can only specify GPRs $2-$7, $16, $17.
If either GPR rt or GPR rs does not contain sign-extended 32-bit values (bits 63..31 equal), then the result of the operation is UNPREDICTABLE.
This instruction has been recoded for Release 6.
if NotWordValue(GPR[rs]) or NotWordValue(GPR[rt]) then UNPREDICTABLE endif temp = GPR[rs] + GPR[rt] GPR[rd] = sign_extend(temp31..0)
None
The term "unsigned" in the instruction name is a misnomer; this operation is 32-bit modulo arithmetic that does not trap on overflow. This instruction is appropriate for unsigned arithmetic, such as address arithmetic, or integer arithmetic environments that ignore overflow, such as C language arithmetic.