Encoding:

POOL16E

011011

rd

rs

Encoded

Immediate

0

6

3

3

3

1

Format:

ADDIUR2 rd, rs1, decoded_immediate_value

microMIPS

Add Immediate Unsigned Word Two Registers (16-bit instr size)

Purpose:

Add Immediate Unsigned Word Two Registers (16-bit instr size)

To add a constant to a 32-bit integer.

Description:

GPR[rd] = GPR[rs] + sign_extend(decoded immediate)

The encoded immediate field is decoded to obtain the actual immediate value.

The decoded immediate value is sign-extended and then added to the 32-bit value in GPR rs, and the 32-bit arithmetic result is sign-extended and placed into GPR rd.

No Integer Overflow exception occurs under any circumstances.

Table 5.9 Encoded and Decoded Values of the Immediate Field

Encoded

Value of

Instr3..1

(Decimal)

Encoded

Value of

Instr3..1

(Hex)

Decoded

Value of

Immediate

(Decimal)

Decoded

Value of

Immediate

(Hex)

0

0x0

1

0x0001

1

0x1

4

0x0004

2

0x2

8

0x0008

3

0x3

12

0x000c

4

0x4

16

0x0010

5

0x5

20

0x0014

6

0x6

24

0x0018

7

0x7

-1

0xffff

Restrictions:

The 3-bit register fields can only specify GPRs $2-$7, $16, $17.

If GPR rs does not contain a sign-extended 32-bit value (bits 63..31 equal), then the result of the operation is

UNPREDICTABLE.

Operation:

if NotWordValue(GPR[rs]) then 
   UNPREDICTABLE 
endif
temp = GPR[rs] + sign_extend(decoded immediate)
GPR[rd] = sign_extend(temp31..0)

Exceptions:

None

Programming Notes:

The term "unsigned" in the instruction name is a misnomer; this operation is 32-bit modulo arithmetic that does not trap on overflow. This instruction is appropriate for unsigned arithmetic, such as address arithmetic, or integer arithmetic environments that ignore overflow, such as C language arithmetic.