Encoding:

Format:

ADDIUPC rt,immediate

Purpose:

Add Immediate to PC (unsigned - non-trapping)

Description:

GPR[rt] = ( PC & ~0x3 + sign_extend( immediate << 2 ) )

This instruction performs a PC-relative address calculation. The 19-bit immediate is shifted left by 2 bits, signextended, and added to the address of the ADDIUPC instruction. The result is placed in GPR rt.

This instruction is both a 32-bit and a 64-bit instruction. The 64-bit result is sign-extended by the same rules that govern sign-extension of virtual addresses in the MIPS64 Architecture, as described by the function effective_address() in the Privileged Resource Architecture.

Restrictions:

None

Availability and Compatibility:

This instruction is introduced by and required as of Release 6.

Operation:

GPR[rst] =  ( PC & ~0x3 + sign_extend( immediate << 2 ) )

Exceptions:

None

Programming Notes:

The term "unsigned" in this instruction mnemonic is a misnomer. "Unsigned" here means "non-trapping". It does not trap on a signed 32-bit overflow. ADDIUPC corresponds to unsigned ADDIU, which does not trap on overflow, as opposed to ADDI, which does trap on overflow.