POOL32A 000000 |
0 0000000000 |
TLBP 0000001101 |
POOL32AXf 111100 |
6 |
10 |
10 |
6 |
TLBP |
microMIPS |
Probe TLB for Matching Entry |
Probe TLB for Matching Entry
To ind a matching entry in the TLB.
The TLBP instruction is unmodiied from the base architectural deinition, exceptin an implementation supporting
GuestID:
When executing in Guest mode, if the GuestID read does not match GuestCtl1ID, then the match fails.
When executing in Root mode, if the GuestID read does not match GuestCtl1RID, then the match fails.
Unchanged from the base architecture.
if IsCoprocessorEnabled(0) then Index = 1 || UNPREDICTABLE31 for i in 0...TLBEntries-1 if ((TLB[i]VPN2 & ~(TLB[i]Mask)) = (EntryHiVPN2 & ~(TLB[i]Mask))) and (TLB[i]R = EntryHiR) and (Config4IE >= 2 && TLB[i]hardware_invalid != 1) and ((IsRootMode() and (TLB[i]GuestID = GuestCtl1RID)) or (IsGuestMode() and (TLB[i]GuestID = GuestCtl1ID))) and ((TLB[i]G = 1) or (TLB[i]ASID = EntryHiASID)) then Index = i endif endfor else SignalException(CoprocessorUnusable, 0) endif
Coprocessor Unusable
Reserved Instruction
Machine Check (implementation deined)