|
POOL32A 000000 |
0000000000 |
TLBINV 0101001101 |
POOL32Axf 111100 |
|
6 |
10 |
10 |
6 |
TLBINVF |
microMIPS |
TLB Invalidate Flush |
TLB Invalidate Flush
The TLBINVF instruction is unmodiied from the base architectural deinition, except in an implementation supporting GuestID:
When executing in Guest mode, if the GuestID read does not match GuestCtl1ID, then the TLB entry is not
modiied.
When executing in Root mode, if the GuestID read does not match GuestCtl1RID, then the TLB entry is not
modiied. Note that this only applies to the root TLB, invalidation of guest virtual address translations requires execution of the equivalent TLBGINVF instruction sequence to modify the guest TLB.
Unchanged from the base architecture.
Coprocessor Unusable
Reserved Instruction