Encoding:

Format:

DMFGC0 rt, rs, sel

Purpose:

Doubleword Move from Guest Coprocessor 0

To move the contents of a guest coprocessor 0 register to a general purpose register (GPR).

Description:

 GPR[rt] = CPR[0,rs,sel]

The contents of the guest context coprocessor 0 register are loaded into GPR rt. Note that not all guest context coprocessor 0 registers support the sel field. In those instances, the sel field must be zero.

Restrictions:

The results are UNDEFINED if the guest context coprocessor 0 does not contain a register as specified by rs and sel, or if the guest context coprocessor 0 register specified by rd and sel is a 32-bit register.

The guest context does not implement the Virtualization Module. Use of this instruction in guest-kernel mode will result in a Reserved Instruction exception, taken in guest mode.

If access to Coprocessor 0 is not enabled, a Coprocessor Unusable Exception is signaled. If access to Coprocessor 0 is enabled but access to 64-bit operations is not enabled, a Reserved Instruction Exception is signaled.

Operation:

if IsCoprocessorEnabled(0) then
   if (Config3VZ = 0) then
      SignalException(ReservedInstruction, 0)
      break
   endif
   if(not Are64bitOperationsEnabled()) then
      SignalException(ReservedInstruction)
   endif
   datadoubleword = Guest.CPR[0,rs,sel]
   GPR[rt] = datadoubleword
else
   SignalException(CoprocessorUnusable, 0)
endif

Exceptions:

Coprocessor Unusable

Reserved Instruction