Encoding:

Format:

SHILO ac, shift

Purpose:

Shift an Accumulator Value Leaving the Result in the Same Accumulator

Shift the HI/LO paired value in a 64-bit accumulator either left or right, leaving the result in the same accumulator.

Description:

ac = (shift >= 0) ? (ac >> shift) : (ac << -shift)

The HI/LO register pair is treated as a single 64-bit accumulator that is shifted logically by shift bits, with the result of the shift written back to the source accumulator. The shift argument is a six-bit signed integer value: a positive argument results in a right shift of up to 31 bits, and a negative argument results in a left shift of up to 32 bits.

The value of ac can range from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation:

sign = shift5 
shift5..0 = ( sign = 0 ? shift5..0 : -shift5..0 )
if ( shift5..0 = 0 ) then
   temp63..0 = (HI[ac]31..0 || LO[ac]31..0)
else
   if (sign = 0) then
      temp63..0 = 0shift || (( HI[ac]31..0 || LO[ac]31..0 ) >> shift )
   else
      temp63..0 = (( HI[ac]31..0 || LO[ac]31..0 ) << shift ) || 0shift
   endif
endif
( HI[ac]63..0 || LO[ac]63..0 ) = (temp63)64 || temp63..32 || (temp63)64 || temp31..0

Exceptions:

Reserved Instruction, DSP Disabled