Encoding:

POOL32A

000000

rt

rs

REPLV.PH

0000001100

POOL32Axf

111100

6

5

5

10

6

SPECIAL3

011111

0

00000

rt

rd

REPLV.PH

01011

ABSQ_S.PH

010010

6

5

5

5

5

6

Format: 

REPLV.PH  rdt, rts

microMIPSDSP

Replicate a Halfword into all Vector Element Positions

Purpose:

Replicate a Halfword into all Vector Element Positions

Replicate a variable halfword into the right-most elements of a halfword vector.

Description: 

rdt = sign_extend(rts15..0 || rts15..0)

The right-most halfword value in register rts is replicated into the two right-most halfword elements of destination register rdt.

The sign of the source halfword is extended into the 32 most-significant bits of the destination register.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

temp15..0 = GPR[rts]15..0
GPR[rdt]63..0 = (temp15..0)32 || temp15..0 || temp15..0

Exceptions:

Reserved Instruction, DSP Disabled