Encoding:

POOL32A

000000

rt

rs

PRECEQ.W.PHL

0101000100

POOL32Axf

111100

6

5

5

10

6

SPECIAL3

011111

0

00000

rt

rd

PRECEQ.W.PHL

01100

ABSQ_S.PH

010010

6

5

5

5

5

6

Format: 

PRECEQ.W.PHL rdt, rts

microMIPSDSP

Precision Expand Fractional Halfword to Fractional Word Value

Purpose:

Precision Expand Fractional Halfword to Fractional Word Value

Expand the precision of a Q15 fractional value taken from the left element of a paired halfword vector to create a Q31 fractional word value.

Description: 

rdt = sign_extend(expand_prec(rts31..16))

The left Q15 fractional halfword value from the two right-most halfwords in register rts is expanded to a Q31 fractional value, sign-extended to 64 bits, and written to destination register rdt. The precision expansion is achieved by appending 16 least-significant zero bits to the original halfword value to generate the 32-bit fractional value.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

temp31..0 = GPR[rts]31..16 || 016
GPR[rdt]63..0 = (temp31)32 || temp31..0

Exceptions:

Reserved Instruction, DSP Disabled