POOL32A 000000 |
0 00000 |
rs |
ac |
MTHLIP 00001001 |
POOL32Axf 111100 |
6 |
5 |
5 |
2 |
8 |
6 |
SPECIAL3 011111 |
rs |
0 00000000 |
ac |
MTHLIP 11111 |
EXTR.W 111000 |
6 |
5 |
8 |
2 |
5 |
6 |
MTHLIP rs, ac |
microMIPSDSP |
Copy LO to HI and a GPR to LO and Increment Pos by 32 |
Copy LO to HI and a GPR to LO and Increment Pos by 32
Copy the LO part of an accumulator to the HI part, copy a GPR to LO, and increment the pos field in the DSPControl register by 32.
ac = sign_extend(LO[ac]31..0) || sign_extend(GPR[rs]31..0) ; DSPControlpos:6..0 += 32
The 32 least-significant bits of the specified accumulator are sign-extended to 64 bits and copied to the most-significant 64 bits of the same accumulator. Then the 32 least-significant bits of register rs are sign-extended to 64 bits and copied to the least-significant 64 bits of the accumulator. The instruction then increments the value of bits 0 through 6 of the DSPControl register (the pos field) by 32.
The result of this instruction is UNPREDICTABLE if the value of the pos field before the execution of the instruction is greater than 32.
The value of ac can range from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
tempA63..0 = ( (GPR[rs]31)32 || GPR[rs]31..0 ) tempB63..0 = ( (LO[ac]31)32) || LO[ac]31..0 ) ( HI[ac]63..0 || LO[ac]63..0 ) = tempB63..0 || tempA63..0 oldpos6..0 = DSPControlpos:6..0 if ( oldpos6..0 > 32 ) then DSPControlpos:6..0 = UNPREDICTABLE else DSPControlpos:6..0 = oldpos6..0 + 32 endif
Reserved Instruction, DSP Disabled