POOL32A 000000 |
index |
base |
rd |
0 |
LWX 0110100101 |
6 |
5 |
5 |
5 |
1 |
10 |
SPECIAL3 011111 |
base |
index |
rd |
LWX 00000 |
LX 001010 |
6 |
5 |
5 |
5 |
5 |
6 |
LWX rd, index(base) |
microMIPSDSP |
Load Word Indexed |
Load Word Indexed
To load a word value from memory as a signed value, using indexed addressing.
rd = memory[base+index]
The contents of GPR index is added to the contents of GPR base to form an effective address. The contents of the 32bit word at the memory location specified by the aligned effective address are fetched, sign-extended to the length of the GPR register, and placed in GPR rd.
The effective address must be naturally-aligned. If either of the two least-significant bits of the address are non-zero, an Address Error exception occurs.
vAddr31..0 = GPR[index]31..0 + GPR[base]31..0 if ( vAddr1..0 != 02 ) then SignalException( AddressError ) endif ( pAddr, CCA ) = AddressTranslation( vAddr, DATA, LOAD ) memwordGPRLEN..0 = LoadMemory( CCA, WORD, pAddr, vAddr, DATA ) GPR[rd]63..0 = sign_extend( memword31..0 )
Reserved Instruction, DSP Disabled, TLB Refill, TLB Invalid, Bus Error, Address Error, Watch