POOL32S 010110 |
index |
base |
rd |
0 |
LDX 0110100101 |
6 |
5 |
5 |
5 |
1 |
10 |
SPECIAL3 011111 |
base |
index |
rd |
LDX 01000 |
LX 001010 |
6 |
5 |
5 |
5 |
5 |
6 |
LDX rd, index(base) |
microMIPSDSP |
Load Doubleword Indexed |
Load Doubleword Indexed
To load a doubleword value from memory as a signed value, using indexed addressing.
rd = memory[base+index]
The contents of GPR index is added to the contents of GPR base to form an effective address. The contents of the 64bit word at the memory location specified by the aligned effective address are fetched and placed in GPR rd.
The effective address must be naturally-aligned. If any of the three least-significant bits of the address are non-zero, an Address Error exception occurs.
vAddr63..0 = GPR[index] + GPR[base] if ( vAddr2..0 != 03 ) then SignalException( AddressError ) endif ( pAddr, CCA ) = AddressTranslation( vAddr, DATA, LOAD ) doubleword63..0 = LoadMemory ( CCA, DOUBLEWORD, pAddr, vAddr, DATA ) GPR[rd]63..0 = doubleword63..0
Reserved Instruction, DSP Disabled, TLB Refill, TLB Invalid, Bus Error, Address Error, Watch