POOL32A 000000 |
rt |
rs |
INSV 0100000100 |
POOL32Axf 111100 |
6 |
5 |
5 |
10 |
6 |
SPECIAL3 011111 |
rs |
rt |
0 00000 |
0 00000 |
INSV 001100 |
6 |
5 |
5 |
5 |
5 |
6 |
INS rt, rs |
microMIPSDSP |
Insert Bit Field Variable |
The operation is UNPREDICTABLE if lsb > msb.
If either register rs or register rt does not contain sign-extended 32-bit values (bits 63..31 equal), then the result of the operation is UNPREDICTABLE.
if (lsb > msb) or (NotWordValue(GPR[rs])) or (NotWordValue(GPR[rt]))) then UNPREDICTABLE endif GPR[rt]63..0 = (GPR[rt]31)32 || GPR[rt]31..msb+1 || GPR[rs]msb-lsb..0 || GPR[rt]lsb-1..0
Reserved Instruction, DSP Disabled