POOL32A 000000 |
rt |
shift |
ac |
EXTR_S.H 11111001 |
POOL32Axf 111100 |
6 |
5 |
5 |
2 |
8 |
6 |
SPECIAL3 011111 |
shift |
rt |
0 000 |
ac |
EXTR_S.H 01110 |
EXTR.W 111000 |
6 |
5 |
5 |
3 |
2 |
5 |
6 |
EXTR_S.H rt, ac, shift |
microMIPSDSP |
Extract Halfword Value From Accumulator to GPR With Right Shift and Saturate |
Extract Halfword Value From Accumulator to GPR With Right Shift and Saturate
Extract a halfword value from a 64-bit accumulator to a GPR with right shift and saturation.
rt = sign_extend(sat16(ac >> shift))
The value in the 64-bit accumulator ac is shifted right by shift bits with sign extension (arithmetic shift right). The 64bit value is then saturated to 16-bits, sign extended to 64 bits, and written to the destination register rt. The shift argument is provided in the instruction.
The value of ac can range from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture. After the execution of this instruction, ac remains unmodified.
This instruction sets bit 23 of the DSPControl register in the ouflag field if the operation results in saturation.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
temp63..0 = shiftShortAccRightArithmetic( ac, shift ) if ( temp63..0 > 0x0000000000007FFF ) then temp31..0 = 0x00007FFF DSPControlouflag:23 = 1 else if ( temp63..0 < 0xFFFFFFFFFFFF8000 ) then temp31..0 = 0xFFFF8000 DSPControlouflag:23 = 1 endif GPR[rt]63..0 = (temp31)32 || temp31..0 function shiftShortAccRightArithmetic( ac1..0, shift4..0 ) sign = HI[ac]31 if ( shift = 0 ) then temp63..0 = HI[ac]31..0 || LO[ac]31..0 else temp63..0 = signshift || (( HI[ac]31..0 || LO[ac]31..0 ) >> shift ) endif if ( sign != temp31 ) then DSPControlouflag:23 = 1 endif return temp63..0 endfunction shiftShortAccRightArithmetic
Reserved Instruction, DSP Disabled