Encoding:

Format:

EXTRV_S.H rt, ac, rs

Purpose:

Extract Halfword Value Variable From Accumulator to GPR With Right Shift and Saturate

Extract a halfword value from a 64-bit accumulator to a GPR with right shift and saturation.

Description:

rt = sign_extend(sat16(ac >> rs4..0))

The value in the 64-bit accumulator ac is shifted right by shift bits with sign extension (arithmetic shift right). The 64bit value is then saturated to 16-bits and sign-extended to 64 bits before being written to the destination register rt.

The five least-significant bits of register rs provide the shift argument, interpreted as a five-bit unsigned integer; the remaining bits in rs are ignored.

The value of ac can range from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture. After the execution of this instruction, ac remains unmodified.

This instruction sets bit 23 of the DSPControl register in the ouflag field if the operation results in saturation.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation:

shift4..0 = GPR[rs]4..0
temp31..0 = shiftShortAccRightArithmetic( ac, shift )
if ( temp63..0 > 0x0000000000007FFF ) then
   temp31..0 = 0x00007FFF
   DSPControl23 = 1
else if ( temp63..0 < 0xFFFFFFFFFFFF8000 ) then
   temp31..0 = 0xFFFF8000
   DSPControl23 = 1
endif
GPR[rt]63..0 = (temp31)32 || temp31..0

Exceptions:

Reserved Instruction, DSP Disabled