POOL32A 000000 |
rt |
rs |
ac |
EXTPDPV 11100010 |
POOL32Axf 111100 |
6 |
5 |
5 |
2 |
8 |
6 |
SPECIAL3 011111 |
rs |
rt |
0 000 |
ac |
EXTPDPV 01011 |
EXTR.W 111000 |
6 |
5 |
5 |
3 |
2 |
5 |
6 |
EXTPDPV rt, ac, rs |
microMIPSDSP |
Extract Variable Bitfield From Arbitrary Position in Accumulator to GPR and Decrement Pos |
Extract Variable Bitfield From Arbitrary Position in Accumulator to GPR and Decrement Pos
Extract a fixed number of contiguous bits from a 64-bit accumulator from a position specified in the DSPControl register, writing the bits to a GPR with zero-extension and modifying the extraction position.
rt = zero_extend(acpos..pos-GPR[rs][4:0]) ; DSPControlpos:6..0 -= (GPR[rs]4..0+1)
ts are extracted from an ar bitrary position in accumulator ac, zero-extended to 64
A fixed number of contiguous bi bits, then written to destination register rt. The number of bits extracted is size+1, where size is specified by the five least-significant bits in register rs, interpreted as a five-bit unsigned integer. The remaining bits in register rs are ignored.
The bit position, start_pos, of the first bit of the contiguous set to extract is specified by the pos field in bits 0 through
5 of the DSPControl register; bit 6 of the DSPControl register is ignored. The position of the last bit in the extracted set is start_pos - size.
The value of ac can range from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture. After the execution of this instruction, accumulator ac remains unmodified.
If start_possize, the extraction is valid and the value of the pos field in the DSPControl register is decre-(1+)1->= mented by size+1. Otherwise, the extraction is invalid and is said to have failed. The value of the destination register is UNPREDICTABLE when the extraction is invalid, and the value of the pos field in the DSPControl register (bits
0 through 6) is not modified.
Upon an invalid extraction this instruction writes a 1 to bit 14, the Ex tract Failed Indicator (EFI) bit of the
DSPControl register, and 0 otherwise.
No data-dependent exceptions are possible.
The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.
start_pos5..0 = DSPControlpos:5..0 size4..0 = GPR[rs]4..0 if ( start_pos - (size+1) >= -1 ) then tempsize..0 = ( HI[ac]31..0 || LO[ac]31..0 )start_pos..start_pos-size GPR[rt] = 0(GPRLEN-(size+1)) || tempsize..0 DSPControlpos:6..0 = DSPControlpos:6..0 - (size + 1) DSPControlEFI:14 = 0 else DSPControlEFI:14 = 1 GPR[rt] = UNPREDICTABLE endif
Reserved Instruction, DSP Disabled