Encoding:

Format:

DPSX.W.PH ac, rs, rt

Purpose:

Cross Dot Product with Subtract on Vector Integer Halfword Elements

Generate the cross dot-product of two integer halfword vector elements using full-size intermediate products and then subtract from the specified accumulator register.

Description:

ac = ac - ((rs31..16 * rt15..0) + (rs15..0 * rt31..16))

The left halfword integer value from register rt is multiplied with the right halfword element from register rs to create an integer word result. Similarly, the right halfword integer value from register rt is multiplied with the left halfword element from register rs to create the second integer word result. These two products are summed to generate the dotproduct result, which is then subtracted from the specified 64-bit HI/LO accumulator, creating a 64-bit integer result.

The value of ac selects an accumulator numbered from 0 to 3. When ac=0, this refers to the original HI/LO register pair of the MIPS64 architecture.

This instruction will not set any bits of the ouflag field in the DSPControl register.

Restrictions:

No data-dependent exceptions are possible.

The operands must be a value in the specified format. If they are not, the result is UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation:

tempB31..0 = (GPR[rs]31..16 * GPR[rt]15..0)
tempA31..0 = (GPR[rs]15..0 * GPR[rt]31..16)
dotp32..0 = ( (tempB31) || tempB31..0 ) + ( (tempA31) || tempA31..0 )
acc63..0 = ( HI[ac]31..0 || LO[ac]31..0 ) - ( (dotp32)31 || dotp32..0 )
( HI[ac]63..0 || LO[ac]63..0 ) = (acc63)32 || acc63..32 || (acc31)32 acc31..0

Exceptions:

Reserved Instruction, DSP Disabled