Encoding:

POOL32S

010110

rt

rs

rd

0

CMPGU.EQ.QB

0011000101

POOL32S

010110

rt

rs

rd

0

CMPGU.LT.QB

0100000101

POOL32S

010110

rt

rs

rd

0

CMPGU.LE.QB

0101000101

6

5

5

5

1

10

SPECIAL3

011111

rs

rt

rd

CMPGU.EQ.QB

00100

CMPU.EQ.QB

010001

SPECIAL3

011111

rs

rt

rd

CMPGU.LT.QB

00101

CMPU.EQ.QB

010001

SPECIAL3

011111

rs

rt

rd

CMPGU.LE.QB

00110

CMPU.EQ.QB

010001

6

5

5

5

5

6

Format: 

CMPGU.cond.QB

Compare Vectors of Unsigned Byte Values and Write Results to a GPR

CMPGU.EQ.QB  rd, rs, rt

microMIPSDSP

Compare Vectors of Unsigned Byte Values and Write Results to a GPR

CMPGU.LT.QB  rd, rs, rt

microMIPSDSP

Compare Vectors of Unsigned Byte Values and Write Results to a GPR

CMPGU.LE.QB  rd, rs, rt

microMIPSDSP

Compare Vectors of Unsigned Byte Values and Write Results to a GPR

Purpose:

Compare Vectors of Unsigned Byte Values and Write Results to a GPR

Perform an element-wise comparison of two vectors of unsigned bytes, recording the results of the comparison in condition code bits that are written to the specified GPR.

Description: 

rd = 060 || (rs31..24 cond rt31..24) || (rs23..16 cond rt23..16) || (rs15..8 cond rt15..8) || (rs7..0 cond rt7..0)

Each of the four right-most unsigned byte elements in register rs are compared with the corresponding unsigned byte elements in register rt. The four 1-bit boolean comparison results are written to the four least-significant bits of destination register rd. The remaining bits in rd are set to zero.

Restrictions:

No data-dependent exceptions are possible.

The operands must be values in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

CMPGU.EQ.QB:
   ccD = GPR[rs]31..24 EQ GPR[rt]31..24 
   ccC = GPR[rs]23..16 EQ GPR[rt]23..16 
   ccB = GPR[rs]15..8 EQ GPR[rt]15..8 
   ccA = GPR[rs]7..0 EQ GPR[rt]7..0 
   GPR[rd]63..0 = 0(GPRLEN-4) || ccD || ccC || ccB || ccA
CMPGU.LT.QB:
   ccD = GPR[rs]31..24 LT GPR[rt]31..24 
   ccC = GPR[rs]23..16 LT GPR[rt]23..16 
   ccB = GPR[rs]15..8 LT GPR[rt]15..8 
   ccA = GPR[rs]7..0 LT GPR[rt]7..0 
   GPR[rd]63..0 = 0(GPRLEN-4) || ccD || ccC || ccB || ccA
CMPGU.LE.QB:
   ccD = GPR[rs]31..24 LE GPR[rt]31..24 
   ccC = GPR[rs]23..16 LE GPR[rt]23..16 
   ccB = GPR[rs]15..8 LE GPR[rt]15..8 
   ccA = GPR[rs]7..0 LE GPR[rt]7..0 
   GPR[rd]63..0 = 0(GPRLEN-4) || ccD || ccC || ccB || ccA

Exceptions:

Reserved Instruction, DSP Disabled