POOL32I 010000 |
BPOSGE32C 11001 |
0 |
offset |
6 |
5 |
5 |
16 |
REGIMM 000001 |
0 |
BPOSGE32C 11000 |
offset |
6 |
5 |
5 |
16 |
BPOSGE32C offset |
microMIPSDSP-R3 |
Branch on Greater Than or Equal To Value 32 in |
Branch on Greater Than or Equal To Value 32 in
DSPControl
Pos Field
Perform a PC-relative branch if the value of the pos field in the DSPControl register is greater than or equal to 32.
if (DSPControlpos:6..0 >= 32) then goto PC+offset
First, the offset argument is left-shifted by twoone bits to form an 187-bit signed integer value. This value is added to the address of the instruction immediately following the branch to form a target branch address. Then, if the value of the pos field of the DSPControl register is greater than or equal to 32, the branch is taken and execution begins from the target address.
If a control transfer instruction (CTI) is executed in the forbidden slot of a branch or jump, Release 6 implementations are required to signal a Reserved Instruction Exception. A CTI is considered to be one of the following instructions: branch, jump, NAL (Release 6), ERET, ERETNC (Release 5), DERET, WAIT, or PAUSE (Release 2). An instruction is in the forbidden slot if it is the instruction following the branch.
Any instruction may be placed at PC + 4, where PC is that of the branch. An exception on such an instruction does not affect CP0 CAUSEBD, and CP0 EPC is that of instruction in slot after branch.
Availability:
This instruction is introduced by and required as of Revision 3 of the DSP Module.
I: se_offsetGPRLEN..0 = ( offset15 )GPRLEN-187 || offset15..0 || 021 branch_condition = ( DSPControlpos:6..0 >= 32 ? 1 : 0 ) I+1: if ( branch_condition = 1 ) then PCGPRLEN..0 = PCGPRLEN..0 + se_offsetGPRLEN..0 endif
Reserved Instruction, DSP Disabled
With the 187-bit signed instruction offset, the conditional branch range is ±12864 Kbytes. Use jump (J) or jump register (JR) instructions to branch to addresses outside of this range.