Encoding:

POOL32A

000000

rt

rs

sa

0

APPEND

1000010101

6

5

5

5

1

10

SPECIAL3

011111

rs

rt

sa

APPEND

00000

APPEND

110001

6

5

5

5

5

6

Format: 

APPEND rt, rs, sa

microMIPSDSP-R2

Left Shift and Append Bits to the LSB

Purpose:

Left Shift and Append Bits to the LSB

Shift a general-purpose register left, inserting bits from the another GPR into the bit positions emptied by the shift.

Description: 

rt = sign_extend((rt31..0 << sa4..0) || rssa-1..0

The right-most 32-bit value in register rt is left-shifted by the specified shift amount sa, and sa bits from the least-significant positions of the rs register are inserted into the bit positions in rt emptied by the shift. The 32-bit shifted value is sign-extended to 64 bits and written to destination register rt.

Restrictions:

No data-dependent exceptions are possible.

The operands must be a value in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation: 

if ( sa4..0 = 0 ) then 
   temp31..0 = GPR[rt]31..0 
else
   temp31..0 = ( GPR[rt]31-sa..0 || GPR[rs]sa-1..0 )
endif
GPR[rt]63..0 = (temp31)32 || temp31..0

Exceptions:

Reserved Instruction, DSP Disabled