POOL32A 000000 |
rt |
rs |
rd |
0 |
ADDWC 1111000101 |
6 |
5 |
5 |
5 |
1 |
10 |
SPECIAL3 011111 |
rs |
rt |
rd |
ADDWC 10001 |
ADDU.QB 010000 |
6 |
5 |
5 |
5 |
5 |
6 |
ADDWC rd, rs, rt |
microMIPSDSP |
Add Word with Carry Bit |
Add Word with Carry Bit
Add two signed 32-bit values with the carry bit in the DSPControl register.
rd = sign_extend(rs + rt + DSPControlc:13)
The right-most 32-bit value in register rt is added to the right-most 32-bit value in register rs and the carry bit in the
DSPControl register. The result is then sign-extended to 64 bits and written to destination register rd.
If the addition results in either overflow or underflow, this instruction writes a 1 t o bit 20 in the ouflag field of the
DSPControl register.
No data-dependent exceptions are possible.
temp32..0 = ( GPR[rs]31 || GPR[rs]31..0 ) + ( GPR[rt]31 || GPR[rt]31..0 ) + ( 032 || DSPControlc:13 ) if ( temp32 != temp31 ) then DSPControlouflag:20 = 1 endif GPR[rd]63..0 = (temp31)32 || temp31..0
Reserved Instruction, DSP Disabled