Encoding:

Format:

ABSQ_S.QB rdt, rts

Purpose:

Find Absolute Value of Four Fractional Byte Values

Find the absolute value of four fractional byte vector elements with saturation.

Description:

rdt = sign_extend(sat8(abs(rts31..24)) || sat8(abs(rts23..16)) || 
sat8(abs(rts15..8)) || sat8(abs(rts7..0)))

For each value in the four right-most Q7 fractional byte elements in register rts, the absolute value is found and written to the corresponding byte in register rdt. If either input value is the minimum Q7 value (-1.0 in decimal, 0x80 in hexadecimal), the corresponding result is saturated to 0x7F. The upper 32 bits of register rts are ignored.

The sign of the left-most byte result is extended into the 32 most-significant bits of destination register rdt.

This instruction sets bit 20 in ouflag field of the DSPControl register if any input value was saturated.

Restrictions:

No data-dependent exceptions are possible.

The operands must be a value in the specified format. If they are not, the results are UNPREDICTABLE and the values of the operand vectors become UNPREDICTABLE.

Operation:

tempD7..0 = abs8( GPR[rts]31..24 )
tempC7..0 = abs8( GPR[rts]23..16 )
tempB7..0 = abs8( GPR[rts]15..8 )
tempA7..0 = abs8( GPR[rts]7..0 )
GPR[rdt]63..0 = (tempD7)32 || tempD7..0 || tempC7..0 || tempB7..0 || tempA7..0
function abs8( a7..0 )
   if ( a7..0 = 0x80 ) then
      DSPControlouflag:20 = 1
      temp7..0 = 0x7F
   else
      if ( a7 = 1 ) then
          temp7..0 = -a7..0
      else
         temp7..0 = a7..0
      endif
   endif
   return temp7..0 
endfunction abs8

Exceptions:

Reserved Instruction, DSP Disabled