Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

tst Rd, Rs 

Rd AND Rs;
 
{d,s} ∈ {0, 1, …, 15}

Rev1+

000

Rs

00111

Rd

3

4

5

4

Description

Test register. Used to check if a subset of a register includes one or more set bits. No writeback of the result is performed, but the flags are set.

Status Flags

Q:

Not affected

V:

Not affected

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

Not affected