Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||
1 |
tlbw |
if (TLBEHI[I] == 1) ITLB[MMUCR[IRP]] = {TLBEHI, TLBELO}; else ITLB[MMUCR[DRP]] = {TLBEHI, TLBELO}; |
None |
Rev1+ |
|
Write the contents of the TLB Entry High and Low (TLBEHI/TLBELO) registers into the addressed TLB entry.
Q: |
Not affected. |
V: |
Not affected. |
N: |
Not affected. |
Z: |
Not affected. |
C: |
Not affected. |
This instruction can only be executed in a privileged mode.