Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

sub Rd, Rs

Rd = Rd - Rs;
{d, s, x, y} ∈ {0, 1, …, 15}

Rev1+

000

Rs

00001

Rd

3

4

5

4

2

sub Rd, Rx, Ry << sa

Rd = Rx - (Ry << sa2);
{d, s, x, y} ∈ {0, 1, …, 15}

Rev1+

111

Rx

00000

Ry

0000000100

sa2

Rd

3

4

5

4

10

2

4

3

sub Rd, imm

if (Rd == SP)
     Rd = Rd - SE(imm8 << 2);
else
     Rd = Rd - SE(imm8);
{d, s, x, y} ∈ {0, 1, …, 15}

Rev1+

0010

imm8

Rd

4

8

4

4

sub Rd, imm

Rd = Rd - SE(imm21);
{d, s, x, y} ∈ {0, 1, …, 15}

Rev1+

111

imm21[20:17]

0001

imm21[16]

Rd

imm21[15:0]

3

4

4

1

4

16

5

sub Rd, Rs, imm

Rd = Rs - SE(imm16);
{d, s, x, y} ∈ {0, 1, …, 15}

Rev1+

111

Rs

01100

Rd

imm16

3

4

5

4

16

Description

Performs a subtraction and stores the result in destination register.

Status Flags:

Format I: OP1 = Rd, OP2 = Rs

Format II:OP1 = Rx, OP2 = Ry << sa2

Format III: OP1 = Rd, if (Rd==SP) OP2 = SE(imm8<<2) else OP2 = SE(imm8)

Format IV: OP1 = Rd, OP2 = SE(imm21)

Format V: OP1 = Rs, OP2 = SE(imm16)

Q:

Not affected

V:

V = (OP1[31] AND ~OP2[31] AND ~RES[31]) OR (~OP1[31] AND OP2[31] AND RES[31])

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

C = ~OP1[31] AND OP2[31] OR OP2[31] AND RES[31] OR ~OP1[31] AND RES[31]