Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||||||||||||||
1 |
st.w Rp++, Rs |
*(Rp) = Rs; Rp = Rp + 4; |
{s , p} ∈ {0, 1, …, 15} |
Rev1+ |
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2 |
st.w --Rp, Rs |
Rp = Rp - 4; *(Rp) = Rs; |
{s , p} ∈ {0, 1, …, 15} |
Rev1+ |
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3 |
st.w Rp[disp], Rs |
*(Rp + ZE(disp4 << 2)) = Rs; |
{s , p} ∈ {0, 1, …, 15} disp ∈ {0, 4, ..., 60} |
Rev1+ |
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4 |
st.w Rp[disp], Rs |
*(Rp + SE(disp16)) = Rs; |
{s , p} ∈ {0, 1, …, 15} disp ∈ {-32768, -32767,…, 32767} |
Rev1+ |
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5 |
st.w Rb[Ri << sa], Rs |
*(Rb + (Ri << sa2)) = Rs; |
{b, i, s} ∈ {0, 1, …, 15} sa ∈ {0, 1, 2, 3} |
Rev1+ |
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The source register is stored to the word memory location referred to by the pointer address.
Q: |
Not affected. |
V: |
Not affected. |
N: |
Not affected. |
Z: |
Not affected. |
C: |
Not affected. |
For formats I. and II., if Rp == Rs the result will be UNDEFINED.