Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

st.b Rp++, Rs

*(Rp) = Rs[7:0];
Rp = Rp + 1;
{s , p} ∈ {0, 1, …, 15}

Rev1+

000

Rp

01100

Rs

3

4

5

4

2

st.b --Rp, Rs

Rp = Rp - 1;
*(Rp) = Rs[7:0];
{s , p} ∈ {0, 1, …, 15}

Rev1+

000

Rp

01111

Rs

3

4

5

4

3

st.b Rp[disp], Rs

*(Rp + ZE(disp3)) = Rs[7:0];
{s , p} ∈ {0, 1, …, 15}
disp ∈ {0, 1, ..., 7}

Rev1+

101

Rp

01

disp3

Rs

3

4

2

3

4

4

st.b Rp[disp], Rs

*(Rp + SE(disp16)) = Rs[7:0];
{s , p} ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}

Rev1+

111

Rp

10110

Rs

disp16

3

4

5

4

16

5

st.b Rb[Ri << sa], Rs

*(Rb + (Ri << sa2)) = Rs[7:0];
{b, i, s} ∈ {0, 1, …, 15}
sa  ∈ {0, 1, 2, 3}

Rev1+

111

Rb

00000

Ri

0000101100

sa2

Rs

3

4

5

4

10

2

4

Description

The source register is stored to the byte memory location referred to by the pointer address.

Status Flags:

Q:

Not affected.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.

Note:

For formats I. and II., if Rp = Rs the result will be UNDEFINED.