Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||
|
1 |
RETE |
If (microarchitecture == AVR32A)
SR = *(SPSYS++)
PC = *(SPSYS++)
If ( SR[M2:M0] == {B'010, B'011, B'100, B'101} )
LR = *(SPSYS++)
R12 = *(SPSYS++)
R11 = *(SPSYS++)
R10 = *(SPSYS++)
R9 = *(SPSYS++)
R8 = *(SPSYS++)
SREG[L] = 0;
else
SR = RSRCurrent Context
PC = RARCurrent Context
SREG[L] = 0; |
None |
Rev1+ |
|
Returns from an exception or interrupt. SREG[L] is cleared to support atomical memory access with the stcond instruction. This instruction can only be executed in INT0-INT3, EX and NMI modes. Execution in Application or Supervisor modes will trigger a Privilege Violation exception.
|
Q: |
Not affected |
|
V: |
Not affected |
|
N: |
Not affected |
|
Z: |
Not affected |
|
C: |
Not affected |