Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

psubaddh.sh Rd, Rx:<part>, Ry:<part> 

If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] = ASR(SE(operand1, 17) - SE(operand2, 17), 1);
Rd[15:0] = ASR(SE(operand1, 17) + SE(operand2, 17), 1);
 
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}

Rev1+

111

Rx

00000

Ry

0010001011

X

Y

Rd

3

4

5

4

10

1

1

4

Description

Perform a subtraction and addition on the same halfword operands which are selected from the source registers. The halfword results are halved in order to prevent any overflows from occuring

Status Flags:

Q:

Not affected.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.