Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||||
1 |
musfr Rs |
SR[3:0] = Rs[3:0]; |
s ∈ {0, 1, …, 15} |
Rev1+ |
|
The instruction copies the lower 4 bits of the register Rs to the lower 4 bits of the status register.
Q: |
Not affected. |
V: |
Not affected. |
N: |
Not affected. |
Z: |
Not affected. |
C: |
Not affected. |