Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

mulwh.d Rd, Rx, Ry:<part> 

operand1 = Rx;
If (Ry-part == t) then operand2 = SE(Ry[31:16]) else operand2 = SE(Ry[15:0]);
(Rd+1:Rd)[63:16] = operand1 × operand2;
Rd[15:0] = 0;
 
d ∈ {0, 2, 4, …, 14}
{x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}

Rev1+

111

Rx

00000

Ry

00001101100

Y

Rd

3

4

5

4

11

1

4

Description

Multiplies the word register with the halfword register specified and stores result in the destina- tion register pair. The halfword register is selected as either the high or low part of Ry. Since the most significant part of the product is stored, no overflow will occur.

Status Flags:

Q:

Not affected.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.