Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

mulsatwh.w Rd, Rx, Ry:<part> 

operand1 = Rx;
If (Ry-part == t) then operand2 = SE(Ry[31:16])  else operand2 = SE(Ry[15:0]);
If ((operand1 == 0x8000_0000) && (operand2 == 0x8000))
      Rd = 0x7FFF_FFFF;
else
      Rd = (operand1 × operand2) >> 15;
 
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}

Rev1+

111

Rx

00000

Ry

00001110100

Y

Rd

3

4

5

4

11

1

4

Description

Multiplies the word register with the halfword register specified and stores the upper 32 bits of the result in the destination word-register. The halfword register is selected as either the high or low part of Ry. Since the most significant part of the product is stored, no overflow will occur. If the two operands equal -1, the result is saturated to the largest positive 32-bit fractional number.

Status Flags:

Q:

Set if saturation occurred, or previously set.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.

Example: 

mulsatwh.wR10, R2, R3:b
will perform R10 = Sat( R2  × SE(R3[15:0]))  >> 15