Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

mulsathh.w Rd, Rx:<part>, Ry:<part> 

If (Rx-part == t) then operand1 = SE(Rx[31:16]) else operand1 = SE(Rx[15:0]);
If (Ry-part == t) then operand2 = SE(Ry[31:16]) else operand2 = SE(Ry[15:0]);
If (operand1 == operand2 == 0x8000)
      Rd = 0x7FFF_FFFF;
else
      Rd = (operand1 × operand2) << 1;
 
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}

Rev1+

111

Rx

00000

Ry

0000100110

X

Y

Rd

3

4

5

4

10

1

1

4

Description

Multiplies the two halfword registers specified, shifts the results one position to the left and stores the result in the destination word-register. If the two operands equals -1, the result is sat- urated to the largest positive 32-bit fractional number. The halfword registers are selected as either the high or low part of the operand registers.

Status Flags:

Q:

Set if saturation occurred, or previously set.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.

Example: 

mulsathh.w R10, R2:t, R3:b
will perform R10 = Sat( (SE(R2[31:16])  × SE(R3[15:0] )) << 1)