Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

mtdr DebugRegisterAddress, Rs

DebugRegister[DebugRegisterAddress << 2] = Rs;
DebugRegisterAddress  ∈ {0, 4, 8, ..., 1020}

Rev1+

111001111011

Rs

00000000

DebugRegisterAddress

12

4

8

8

Description

The instruction copies the value in the specified register to the specified debug register. Note that special timing concerns must be considered when operating on the system registers, see the Pipeline Chapter for details.

Status Flags:

Q:

Not affected.

V:

Not affected.

N:

Not affected.

Z:

Not affected.

C:

Not affected.

Note:

The debug registers are implementation defined, and updates of these registers are handled in an implementation specific way.

This instruction can only be executed in a privileged mode. Execution from any other mode will trigger a Privilege Violation exception.