Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

eorh Rd, imm 

Rd[31:16] = Rd[31:16] XOR imm16
 
d ∈ {0, 1, …, 15}
imm ∈ {0, 1, ..., 65535}

Rev1+

111011100001

Rd

imm16

12

4

16

2

eorl Rd, imm 

Rd[15:0]   = Rd[15:0] XOR imm16
 
d ∈ {0, 1, …, 15}
imm ∈ {0, 1, ..., 65535}

Rev1+

111011000001

Rd

imm16

12

4

16

Description

Performs a bitwise logical Exclusive-OR between the high or low halfword in the specified regis- ter and a constant. The result is stored in the destination register.

Status Flags:

Q:

Not affected

V:

Not affected

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

Not affected