Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

cpc Rd, Rs 

Rd - Rs - C;
 
{d, s} ∈ {0, 1, …, 15}

Rev1+

111

Rs

00000

Rd

0001001100000000

3

4

5

4

16

2

cpc Rd 

Rd - C;
 
d ∈ {0, 1, …, 15}

Rev1+

010111000010

Rd

12

4

Description

Performs a compare between the two registers specified. The operation is executed by doing a subtraction with carry (as borrow) without writeback of the difference. The operation sets the sta- tus flags according to the result of the subtraction, but does not affect the operand registers. Note that the zero flag status before the operation is included in the calculation of the new zero flag. This instruction allows large compares (64, 128 or more bits).

Status Flags:

In format II, Rs referred to below equals zero.

Q:

Not affected

V:

V = (Rd[31] AND ~Rs[31] AND ~RES[31]) OR (~Rd[31] AND Rs[31] AND RES[31])

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0) AND Z

C:

C = ~Rd[31] AND Rs[31] OR Rs[31] AND RES[31] OR ~Rd[31] AND RES[31]