Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||||||||||||||
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1 |
bfextu Rd, Rs, bp5, w5 |
Rd = ZE(Rs[bp5+w5-1:bp5]); |
{d, s} ∈ {0, 1, …, 15}
{bp5, w5} ∈ {0, 1, ..., 31} |
Rev1+ |
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This instruction extracts and zero-extends the w5 bits in Rs starting at bit-offset bp5 to Rd.
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Q: |
Not affected |
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V: |
Not affected |
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N: |
N = RES[31] |
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Z: |
Z = (RES[31:0] == 0) |
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C: |
C = RES[31] |
If (w5 = 0) or if (bp5 + w5 > 32) the result is undefined.