Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

bfexts Rd, Rs, bp5, w5 

Rd = SE(Rs[bp5+w5-1:bp5]);
 
{d, s} ∈ {0, 1, …, 15}
{bp5, w5} ∈ {0, 1, ..., 31}

Rev1+

111

Rd

11101

Rs

101100

bp5

w5

3

4

5

4

6

5

5

Description

This instruction extracts and sign-extends the w5 bits in Rs starting at bit-offset bp5 to Rd.

Status Flags:

Q:

Not affected

V:

Not affected

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

C = RES[31]

Note:

If (w5 = 0) or if (bp5 + w5 > 32) the result is undefined.