Operations:

Format

Syntax:

Operation:

Operands:

Architecture revision

Opcode

1

andn Rd, Rs 

Rd = Rd AND ~Rs;
 
{d, s} ∈ {0, 1, …, 15}

Rev1+

000

Rs

01000

Rd

3

4

5

4

Description

Performs a bitwise logical ANDNOT between the specified registers and stores the result in the destination register.

Status Flags

Q:

Not affected

V:

Not affected

N:

N = RES[31]

Z:

Z = (RES[31:0] == 0)

C:

Not affected